Why Microchip Manufacturers Plan to Replace Silicon by 2041
Leuven, Sunday 23 August 2026
Research hub Imec projects silicon’s retirement by 2041, replacing it with 2D materials like molybdenum disulphide, which are three atoms thick and consume up to 1,000 times less energy.
Staving Off Quantum Tunneling at the Angstrom Scale
For more than sixty years, silicon has served as the bedrock of modern computing, but the material is rapidly approaching its fundamental physical limits [1][2]. As transistors shrink toward atomic dimensions, chipmakers face severe quantum tunneling effects, a phenomenon where electrons act as waves rather than particles, leading to massive current leakage [2]. To combat this, the semiconductor industry has transitioned from traditional three-dimensional FinFET designs to gate-all-around (GAA) architectures [1]. A prominent example of this shift is Intel’s implementation of nanosheets and backside power delivery in its 18A node, which provides tighter control over the transistor channel [1].
The Roadmap Beyond Silicon
According to an updated technology roadmap published by the Leuven-based nanoelectronics research hub Imec on approximately 31 July 2026, silicon processing using extreme ultraviolet (EUV) lithography will remain viable throughout the 2030s [2]. However, the next major architectural milestone will be the Complementary Field-Effect Transistor (CFET) [1][2]. Expected to reach commercial production around 2033 at the angstrom-scale node, CFET architecture vertically stacks two transistors within a single footprint to drastically reduce cell area [1][2][4]. Yet, even CFETs will eventually exhaust silicon’s physical capabilities, paving the way for its complete removal from the transistor channel by circa 2041 [1][2].
The Three-Atom-Thick Successor
The primary candidate designated to succeed silicon is molybdenum disulphide (MoS₂), a two-dimensional (2D) transition metal dichalcogenide [1][2][4]. Historically utilised as an industrial lubricant known as molybdenite, MoS₂ consists of a single layer of molybdenum atoms sandwiched between two layers of sulfur atoms, creating a structure that is just three atoms and 0.5 nanometres thick [1][2]. This extreme thinness provides superior gate control over electron flow compared to heavily thinned silicon, enabling a dramatic reduction in operating voltage [1][2]. Because energy consumption scales with the square of the voltage, halving the voltage reduces power draw by a factor of four [1]; ultimately, research indicates that MoS₂ transistors can consume up to 1,000 times less energy than equivalent silicon-based devices [1][2].
Overcoming the Defectivity Bottleneck
Transitioning to 2D materials at sub-1nm gate lengths presents immense manufacturing hurdles, particularly regarding material quality and interface defectivity [4]. Imec researchers have identified atomic-scale interface defects as the single largest obstacle to device performance, surpassing challenges associated with contact resistance [4]. At these atomic dimensions, tolerance for contamination is virtually non-existent, and the industry’s ability to detect and characterise such defects is severely strained [4]. Furthermore, ‘stochastic defectivity’—statistically unavoidable pattern defects that emerge at extreme ultraviolet dimensions—remains an active area of investigation rather than a solved problem within the High-NA EUV lithography roadmap [4].
European Autonomy and Ecosystem Synergy
Establishing leadership in 2D materials is vital for European strategic autonomy and supply chain resilience [GPT]. Founded in 1984, Imec employs between 5,001 and 10,000 staff [3] and collaborates closely with global chipmaking giants and equipment manufacturers, including Intel, TSMC, and ASML, to standardise these next-generation processes [2]. To accelerate the discovery of advanced semiconductor materials, Imec has joined the AI Materials Foundry as one of 48 founding members, partnering alongside industrial leaders such as NVIDIA, Meta, Samsung Electronics, Tokyo Electron, and Applied Materials [3]. Showing its global engagement beyond pure research, Imec staff recently donated €1,736 for earthquake relief in Venezuela, which was matched by the corporation to reach a total of €3472 [3].
Pioneering the Next Era of Compute
Imec is also driving innovations in neuromorphic computing and chiplet architectures. The hub recently developed a Neuromorphic Compressive Telemetry (NCT) chip capable of reducing neural data volumes by more than ten times [3]. While neuromorphic silicon shows immense promise, experts note that software compilers, SDKs, and verification standards will ultimately decide its market adoption [5]. To foster regional innovation, Imec Germany recently joined the CHIP CONNECT BW initiative in Baden-Württemberg, focusing on chiplet-based architectures for physical AI and autonomous edge applications [3]. To showcase these developments, Imec is sponsoring the TechWorks Semiconductors to Systems Summit in London on 26 August 2026, where representative Katayoon Basharkhah will present on engineering the future of automotive compute platforms [3].